Subject: A doubt on selfID processing!!!

From: venkatesh v <[email-masked]>
Date: Tue, 25 May 1999 06:16:43 -0700

Hi 1394 gurus,
I am developing a 1394 OHCI device driver. In the initialization phase,

Firstly i set the LPS bit and enable the Link-PHY communication.
Then after some register initializations, i allocate a 2K aligned
memory for Selfid Buffer, write the address of the allocated memory
into the offset 0x64 (selfIDBuffer). Then i set the rcvselfid bit in
LinkControl set register(offset : 0xe0).

Now if i try to generate a bus reset interrupt by writing IBR=1 in the
PHY register, the ISR for Bus reset is not invoked & the initialization
procedure hangs.
But suppose i dont set the rcvselfidbit, then the ISR gets invoked and
bus reset is propagated across the bus. it is to be noted that there
are only 2 nodes connected in the bus.

Does this rcvselfid bit have any other significance otehr than enabling
the RcvselfidDMA???

Eagerly awaiting a reply....

Rgds,
Venkat....

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From: Nagaraj G <[email-masked]>
Date: Wed, 26 May 1999 08:05:48 +0530

Hi Venkat,

Question 1) What other registers you are initializing before programming the
selfIDBuffer register?
Question 2) Are you writing a valid Physical address into selfIDBuffer
register?
Question 3) Are you clearing the busReset & selfIDComplete bits in the ISR?

Hope to get reply for helping you.

Raj

-----Original Message-----
From: IETF IP over 1394 Working Group
[mailto:[email-masked]]On Behalf Of venkatesh v
Sent: Tuesday, May 25, 1999 6:47 PM
To: [email-masked]
Subject: A doubt on selfID processing!!!

Hi 1394 gurus,

Rgds,
Venkat....